# overview
Research focuses on optimizing computer hardware and software and learning models for data-intensive, cognitive and AI applications; computer systems for data-intensive and machine learning; VLSI circuits and systems; Embedded systems

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4606 Distributed Computing And Systems Software

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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30 Agricultural, Veterinary And Food Sciences

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Networking And Information Technology R&d (nitrd)

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Machine Learning And Artificial Intelligence

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

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30 Agricultural, Veterinary And Food Sciences

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4603 Computer Vision And Multimedia Computation

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4009 Electronics, Sensors And Digital Hardware

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Machine Learning And Artificial Intelligence

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4009 Electronics, Sensors And Digital Hardware

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3709 Physical Geography And Environmental Geoscience

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
30 Agricultural, Veterinary And Food Sciences

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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3403 Macromolecular And Materials Chemistry

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
3403 Macromolecular And Materials Chemistry

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

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3709 Physical Geography And Environmental Geoscience

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# educationAndTraining[].organization.label
Stanford University - (Stanford, California, United States)

# educationAndTraining[].organization.label
Stanford University - (Stanford, California, United States)

# educationAndTraining[].organization.label
Iowa State University - (Ames, Iowa, United States)

# publications[].label
Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
4.0GHz 0.18m CMOS PLL based on an interpolative oscillator

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Transforming Memory Systems: Optimizing for Client Value on Emerging Workloads

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Issues in High-Frequency Processor Design

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Enhanced leakage reduction techniques using intermediate strength power gating

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Predicting Large Wildfires in the Contiguous United States Using Deep Neural Networks

# publications[].label
A 1.0-GHz single-issue 64-bit powerPC integer processor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

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Variability and Power Management in sub-100nm SOI Technology for Reliable High Performance Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Circuit Design Style for Energy Efficiency: LSDL and Compound Domino

# publications[].label
Unmanned aerial system and machine learning driven Digital-Twin framework for in-season cotton growth forecasting

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System design using wave-pipelining: A CMOS VLSI vector unit

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A low-overhead virtual rail technique for SRAM leakage power reduction

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 16-bit/spl times/16-bit MAC design using fast 5:2 compressors

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A dual-VDD boosted pulsed bus technique for low power and low leakage operation

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
An On-Chip Dual Supply Charge Pump System for 45nm PD SOI eDRAM

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

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A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Guest Editors' Introduction: New Dimensions in 3D Integration

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A fast hybrid carry-lookahead/carry-select adder design

# publications[].publisher
Association for Computing Machinery (ACM)

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A Simplified Design Model for Random Process Variability

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Rigorous Extraction of Process Variations for 65-nm CMOS Design

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Circuit design techniques for a gigahertz integer microprocessor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Design Model for Random Process Variability

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An Asymmetrical Double-Gate VCO with Wide Frequency Range

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Predicting large wildfires in the Contiguous United States using deep neural networks

# publications[].publisher
SPIE, the international society for optics and photonics

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SRAM Local Bit Line Access Failure Analyses

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Requirement-based design methods for adaptive communications links

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
A 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b PowerPC processor

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CNN-based real-time prediction of growth stage in soybeans cultivated in hydroponic set-ups

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
TCAD/Physics-Based Analysis of High-Density Dual-BOX FD/SOI SRAM Cell With Improved Stability

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Dynamic Power Management by Combination of Dual Static Supply Voltages

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Adaptive MTCMOS for Dynamic Leakage and Frequency Control using Variable Footer Strength

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Privacy First Path Analysis Using Clickstream Data

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Back-Gate Controlled Wide Tunable Range Diode Voltage in Asymmetrical Double-Gate Devices

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Controlled-load limited switch dynamic logic circuit

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Tera-Op Reliable Intelligently Adaptive Processing System (TRIPS)

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1 GHz leading zero anticipator using independent sign-bit determination logic

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Issues in high-frequency processor design

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On-Chip Delay Measurement Based Response Analysis for Timing Characterization

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Design methodology for a 1.0 GHz microprocessor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

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In-situ Measurement of Variability in 45-nm SOI Embedded DRAM Arrays

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Dynamic circuit techniques using independently controlled double-gate devices

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

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Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI.

# publications[].publisher
Technische Universitt Darmstadt, Insitute of Microelectronic Systems

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The design and application of the PowerPC 405LP energy-efficient system-on-a-chip

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Characterization and Design for Variability and Reliability

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Testing the Performance of LSTM and ARIMA Models for In-Season Forecasting of Canopy Cover (CC) in Cotton Crops

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Custom circuit design as a driver of microprocessor performance

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Analysis of clocked timing elements for dynamic voltage scaling effects over process parameter variation

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Technology variability and uncertainty implications for power- efficient VLSI systems

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Statistical Yield Analysis of Silicon-On-Insulator Embedded DRAM

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Rigorous Extraction of Process Variations for 65nm CMOS Design

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Analysis of the impact of gate-body signal phase on DTMOS inverters in 0.13m PD-SOI

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Plant Height Estimation using Satellite/UAV Data Fusion and Machine Learning

# publications[].label
Rigorous extraction of process variations for 65nm CMOS design

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Approaches to run-time and standby mode leakage reduction in global buses

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Fine grained multi-threshold CMOS for enhanced leakage reduction

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
The design and implementation of a low-overhead supply-gated SRAM

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Design Model for Random Process Variability.

# publications[].label
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Cotton yield prediction utilizing unmanned aerial vehicles (UAV) and Bayesian neural networks

# publications[].label
A 0.9V to 1.95V dynamic voltage-scalable and frequency-scalable 32b powerPC processor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Transforming Memory Systems: Optimizing for Client Value on Emerging Workloads

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A low latency and low power dynamic Carry Save Adder

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Rapid Characterization of Threshold Voltage Fluctuation in MOS Devices

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
In-Season Growth Forecasting in Cotton Using Unmanned Aerial System- based Canopy Attributes and LSTM Models

# publications[].label
Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Realistic Predictors for Regression and Semantic Segmentation

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Systematic Model Complexity Reduction by Elimination of Irrelevant Layers in Convolutional Neural Networks

# publications[].label
Fine grained multi-threshold CMOS for enhanced leakage reduction

# publications[].label
High speed serializing/de-serializing design-for-test method for evaluating a 1 GHz microprocessor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 16-Bit by 16-Bit MAC Design Using Fast 5:3 Compressor Cells

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A low latency and low power dynamic Carry Save Adder.

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Deep Transfer Learning based approach for forecasting spatio-temporal features to maximize yield in cotton crops

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Design of Shifting and Permutation Units using LSDL Circuit Family

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Wide limited switch dynamic logic circuit implementations

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 0.9V to 1.95V Dynamic Voltage-Scalable and Frequency-Scalable 32b PowerPC Processor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
The SNAP project: towards sub-nanosecond arithmetic

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Physical design challenges beyond the 22nm node

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Tools and Methods for enabling senior design classes during the COVID19 pandemic and their application to future challenges

# publications[].publisher
American Society for Engineering Education

# publications[].label
A Test Structure for Characterizing Local Device Mismatches

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Scheme for On-Chip Timing Characterization* *This work was supported in part by the Gigascale Systems Research Center at UC Berkeley under contract 2003-DT-660 from Microelectronics Advanced Research Corporation(MARCO).

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Issues in High-Frequency Processor Design

# publications[].label
Approaches to Run-Time and Standby Mode Leakage Reduction in Global Buses

# publications[].label
Stable High-Density FD/SOI SRAM with Selective Back-Gate Bias Using Dual Buried Oxide

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 1 GHz single-issue 64 b PowerPC processor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Resonant clocking using distributed parasitic capacitance

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Adaptive Design for Performance-Optimized Robustness**This work was supported in part by the IBM Faculty Partnership Award Program, and in part by the Gigascale Systems Research Center at UC Berkeley under contract 2003-DT-660 from Microelectronics Advanced Research Corporation (MARCO).

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
"Timing closure by design," a high frequency microprocessor design methodology

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Accurate Current Mirroring in the Presence of Gate Leakage Current

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Resonant clocking using distributed parasitic capacitance

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Survival of VLSI Design - Coping with Device Variability and Uncertainty

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Circuits and microarchitecture for gigahertz VLSI designs

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 1.0 GHz single-issue 64 b powerPC integer processor

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Leading zero anticipation and detection - A comparison of methods

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# etdChairOf[].label
Gadepally, Krishna Chaitanya (2023-05). Techniques and Methods for Improved Effectiveness and Accuracy in Computer Vision Applications. Master's Thesis.

# etdChairOf[].label
Lopez Carrasco, Cesar Ramon (2020-12). Scalable Systolic Array Architecture (SSAA) - A General Convolutional Neural Network ISA and Compiler-Enabled Dataflow to Maximize Parallelism While Reducing Memory Utilization. Master's Thesis.