# overview
My research interests include information theory and coding theory, data storage, machine learning, networks and algorithm design.

# keywords[]
Reliable Computing With Unreliable Components

# keywords[]
35 Commerce, Management, Tourism And Services

# keywords[]
Machine Learning And Artificial Intelligence

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4606 Distributed Computing And Systems Software

# educationAndTraining[].organization.label
California Institute of Technology - (Pasadena, California, United States)

# educationAndTraining[].organization.label
California Institute of Technology - (Pasadena, California, United States)

# educationAndTraining[].organization.label
Tsinghua University - (Beijing, Beijing, China)

# awardsAndHonors[].label
CSE Graduate Faculty Teaching Excellence Award

# awardsAndHonors[].label
Faculty Early Career Development (CAREER) Program

# publications[].label
Asymmetric Error Correction and Flash-Memory Rewriting Using Polar Codes

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Exploiting Source Redundancy to Improve the Rate of Polar Codes

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
On the Capacity and Programming of Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Patterned Cells for Phase Change Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Functional Error Correction for Robust Neural Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Maximizing the storage capacity of nonvolatile memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Noise Modeling and Capacity Analysis for NAND Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
On the Planarization of Wireless Sensor Networks

# publications[].label
A Cross-Layer Design for End-to-End On-Demand Bandwidth Allocation in Infrastructure Wireless Mesh Network

# publications[].label
Rewriting Codes for Joint Information Storage in Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Elimination of Cyclic Stopping Sets for Enhanced Decoding of LDPC Codes

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Content-assisted File Decoding for Nonvolatile Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error Correction and Detection for Analog AI Computing in Edge Systems

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Localization and routing in sensor networks by local angle information

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Face Tracing Based Geographic Routing in Nonplanar Wireless Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Polar Coding for Noisy Write-Once Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Analog Error-Correcting Codes: Designs and Analysis

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Society for Industrial & Applied Mathematics (SIAM)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error Correction through Language Processing

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error correcting code for flash memories

# publications[].label
Nonuniform Codes for Correcting Asymmetric Errors

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Buffer Coding for Asymmetric Multi-Level Memory

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Optimal Content Placement for En-Route Web Caching* *This work was supported in part by the Lee Center for Advanced Networking at the California Institute of Technology.

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Network file storage with graceful performance degradation

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Storage Coding for Wear Leveling in Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Systematic Error-Correcting Codes for Rank Modulation

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Locality Sensitive Information Brokerage in Distributed Sensor Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Floating codes for joint information storage in write asymmetric memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Joint Rewriting and Error Correction in Write-Once Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
On LDPC Decoding with Natural Redundancy

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Rank-Modulation Rewriting Codes for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Coding for Secure Write-Efficient Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Universal Rewriting in Constrained Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Correcting Charge-Constrained Errors in the Rank-Modulation Scheme

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Coding for Noisy Write-Efficient Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Separability and Topology Control of Quasi Unit Disk Graphs

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Functional Error Correction for Reliable Neural Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
MAP: Medial axis based geometric routing in sensor networks

# publications[].label
Joint Decoding of Content-Replication Codes for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Machine Learning: Enabling and Enabled by Advances in Storage and Memory Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Monotone Percolation and the Topology Control of Wireless Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Systematic Error-Correcting Codes for Rank Modulation

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Maximizing the Storage Capacity of Nonvolatile Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Position Modulation Code for Rewriting Write-Once Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Rank-Modulation Rewriting Codes for Flash Memories

# publications[].label
Constrained Codes for Phase-change Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Variable-level Cells for Nonvolatile Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Nonuniform Codes for Correcting Asymmetric Errors in Data Storage

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
LDPC Codes for Rank Modulation in Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
CodNN - Robust Neural Networks From Coded Classification

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
On the generalization of error-correcting WOM codes

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Optimized Cell Programming for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Half-Wits: Software Techniques for Low-Voltage Probabilistic Storage on Microcontrollers with NOR Flash Memory

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Joint Source-Channel Decoding of Polar Codes for Language-Based Sources

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error Correcting Code for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Symbolic Modeling for Financial Asset Pricing

# publications[].label
Rank-Modulation Rewrite Coding for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Memory allocation in information storage networks

# publications[].label
Reinforcement Prompting for Financial Synthetic Data Generation

# publications[].label
Data Archiving in 1x-nm NAND Flash Memories: Enabling Long-Term Storage using Rank Modulation and Scrubbing

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Diversity Coloring for Information Storage in Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
On the Capacity of Bounded Rank Modulation for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Polar Codes for Secure Write-Efficient Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Information Representation and Coding for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Separability and topology control of quasi unit disk graphs

# publications[].label
Localization and Routing in Sensor Networks by Local Angle Information

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Machine Learning and Algorithmic Techniques for Error Correction

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Study of Polar Codes for MLC NAND Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
CODA: Temporal Domain Generalization via Concept Drift Simulator

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Storage Coding for Wear Leveling in Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error-Correcting Schemes with Dynamic Thresholds in Nonvolatile Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
SOFTONIC: A Photonic Design Approach to Softmax Activation for High-Speed Fully Analog AI Acceleration

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Joint rewriting and error correction in write-once memories

# publications[].label
Robust planarization of unlocalized wireless sensor networks

# publications[].label
Data Movement and Aggregation in Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error Correction and Partial Information Rewriting for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Coding for Secure Write-Efficient Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Information representation and coding for flash memories

# publications[].label
On The Parallel Programming of Flash Memory Cells

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Guest Editorial Communication Methodologies for the Next-Generation Storage Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Network coding for joint storage and transmission with minimum cost

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Error-Correcting Codes for Rank Modulation

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
In-Memory Computing of Akers Logic Array

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Multicluster Interleaving on Paths and Cycles

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
MAP: medial axis based geometric routing in sensor networks

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Error Scrubbing Codes for Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Symbolic Regression for Data Storage with Side Information

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Polar Codes are Optimal for Write-Efficient Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Trade-offs between Instantaneous and Total Capacity in Multi-Cell Flash Memories

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Robust Planarization of Unlocalized Wireless Sensor Networks.

# researcherOn[].label
CIF: Small: Collaborative Research: Coding for Green Storage Technologies in Nonvolatile Memories

# researcherOn[].awardedBy.label
National Science Foundation - (Arlington, Virginia, United States)

# researcherOn[].label
CIF: Small: Error Correction with Natural Redundancy

# researcherOn[].awardedBy.label
National Science Foundation - (Arlington, Virginia, United States)

# streetAddress
Texas A&M University; Computer Science & Engineering; 3112 TAMU

# etdChairOf[].label
Javar, Nilesh Kumar (2015-05). Error Correction Using Natural Language Processing. Master's Thesis.

# etdChairOf[].label
Wang, Yue (2013-05). Data Representation for Efficient and Reliable Storage in Flash Memories. Doctoral Dissertation.

# etdChairOf[].label
Li, Yue (2014-05). Algorithms and Data Representations for Emerging Non-Volatile Memories. Doctoral Dissertation.

# etdChairOf[].label
Mohammed, Shoeb Ahmed (2010-10). Coding Techniques for Error Correction and Rewriting in Flash Memories. Master's Thesis.

# etdChairOf[].label
Li, Hao (2010-08). Storage Techniques in Flash Memories and Phase-change Memories. Doctoral Dissertation.

# etdChairOf[].label
Zhang, Weiwei (2014-11). Search Text Based on Locations. Master's Thesis.

# etdChairOf[].label
Mahapatra, Sonali (2014-08). Priority Based Switch Allocator in Adaptive Physical Channel Regulator for On Chip Interconnects. Master's Thesis.

# etdChairOf[].label
Li, Qing (2015-12). Towards Endurable, Reliable and Secure Flash Memories-a Coding Theory Application. Doctoral Dissertation.

# etdChairOf[].label
Sunder, Gowrishankar (2015-05). Error Correction Using Probabilistic Language Models. Master's Thesis.

# etdChairOf[].label
Khurjekar, Ishan Dhananjay (2018-08). Deep Learning for Reliable Storage. Master's Thesis.

# etdChairOf[].label
Chang, Huan (2015-12). Joint Decoding of Content-Replicated Codes on AWGNC for Flash Memory. Master's Thesis.

# etdChairOf[].label
Zhang, Fenghui (2008-10). Effective algorithms and protocols for wireless networking: a topological approach. Doctoral Dissertation.