# overview
My principal areas of research are Embedded Systems, Systems on Chip, Low-power system design, and Data Analytic Codesign.

# keywords[]
4009 Electronics, Sensors And Digital Hardware

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4606 Distributed Computing And Systems Software

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4.2 Evaluation Of Markers And Technologies

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

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4009 Electronics, Sensors And Digital Hardware

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4603 Computer Vision And Multimedia Computation

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4903 Numerical And Computational Mathematics

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4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4606 Distributed Computing And Systems Software

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# keywords[]
4009 Electronics, Sensors And Digital Hardware

# educationAndTraining[].name
B.S.E. Bachelor of Science in Engineering

# educationAndTraining[].organization.label
Sambalpur University - (Sambalpur, Orissa, India)

# educationAndTraining[].organization.label
Indian Institute of Technology Kharagpur - (Kharagpur, India)

# educationAndTraining[].organization.label
Sambalpur University - (Sambalpur, Orissa, India)

# publications[].label
Integrated scheduling and buffer management scheme for input queued switches under extreme traffic conditions

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
m-Trie: An efficient approach to on-chip logic minimization

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Quantized LDPC decoder design for binary symmetric channels

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Fast and Communication-Efficient Algorithm for Distributed Support Vector Machine Training

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
On-chip Parallel Photonic Reservoir Computing using Multiple Delay lines

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Hierarchical Evolutionary Heuristic A* Search

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Bound for unwanted clock skew due to wire width variation

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip

# publications[].label
Timing driven track routing considering coupling capacitance

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Hierarchical Reconfigurable Computing Arrays For Efficient CGRA-based Embedded Systems

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Architectural Simulations of a Fast, Source-Synchronous Ring-based Network-on-Chip Design

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
BPhoton-CNN: An Ultrafast Photonic Backpropagation Accelerator for Deep Learning

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Key Predistribution Schemes for Establishing Pairwise Keys with a Mobile Sink in Sensor Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Semantic Key for Meaning Based Searching

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Dynamic aggregation of virtual addresses in TLB using TCAM cells

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
PowerAntz: Distributed Power Sharing Strategy for Network on Chip

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Hierarchical simulation of a multiprocessor architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Reliability evaluation of multistage interconnection networks with multi-state elements

# publications[].label
Distributed Collaborative Filtering on a Single Chip Cloud Computer

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
MReC: A Multilayer Photonic Reservoir Computing Architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Evolutionary Heuristic A* search: Heuristic Function Optimization via Genetic Algorithm

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Towards Reconfigurable Optoelectronic Hardware Accelerator for Reservoir Computing

# publications[].publisher
SPIE, the international society for optics and photonics

# publications[].label
Dynamically Compressible Context Architecture for Low Power Coarse-Grained Reconfigurable Array

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Reducing clock Skew variability via cross links

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Reusable context pipelining for low power coarse-grained reconfigurable architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Coupling aware timing optimization and antenna avoidance in layer assignment

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Designing a Collaborative Filtering Recommender on the Single Chip Cloud Computer

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A space- and time-efficient hash table hierarchically indexed by bloom filters

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Optimizing a Collaborative Filtering Recommender for Many-Core Processors

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A TDM test scheduling method for network-on-chip systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Dynamic Slack Management Technique for Real-Time Distributed Embedded Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Distributed QR decomposition framework for training Support Vector Machines

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
PERFORMANCE MODELING OF DISCRETE COSINE TRANSFORM FOR STAR GRAPH CONNECTED MULTIPROCESSORS

# publications[].label
EaseCAM: an energy and storage efficient TCAM-based router architecture for IP lookup

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Feed back-control led reliability-aware power management for real-time embedded systems

# publications[].label
Forward Error Correction For On-chip Interconnection Networks

# publications[].label
Fully associative cache partitioning with don't care bits for real-time applications

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
TCAM architecture for IP lookup using prefix properties

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An Automated Approach for Minimum Jitter Buffered H - Tree Construction

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Data Handling Limits of On-Chip Interconnects

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Mapping of backpropagation learning onto distributed memory multiprocessors

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
ConvLight: A Convolutional Accelerator with Memristor integrated Photonic Computing

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Hardware Performance Counters for Embedded Software Anomaly Detection

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
IEEE Workshop on Embedded System Codesign (ESCODES)

# publications[].label
An integrated scheduling and buffer management scheme for input queued switches with finite buffer space

# publications[].label
Hardware assisted watermarking for multimedia

# publications[].label
Dynamic Context Management for Low Power Coarse-Grained Reconfigurable Architecture

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
A Hardware Scheduler for Real Time Multiprocessor System on Chip

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Performance analysis of 2-D inverse fast cosine transform employing multiprocessors

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An Efficient Approach to On-Chip Logic Minimization

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Modelling Hadamard Haar transform algorithm for omega connected multiprocessors

# publications[].label
BiGNoC: Accelerating Big Data Computing with Application-Specific Photonic Network-on-Chip Architectures

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Parallel Architecture for Meaning Comparison

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Reliability analysis of hypercube multicomputers

# publications[].label
Practical and Verifiable C++ Dynamic Cast for Hard Real-Time Systems

# publications[].publisher
Korean Institute of Information Scientists and Engineers

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An Efficient Key Distribution Scheme for Establishing Pairwise Keys with a Mobile Sink in Distributed Sensor Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Parallel Processor Core for Semantic Search Engines

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Multi-Agent Pathfinding with Hierarchical Evolutionary Hueristic A

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An energy-efficient slack distribution technique for multimode distributed real-time embedded systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Throughput-Efficient Packet Classifier with n Bloom Filters

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
PID Controlled Thermal Management in Photonic Network-on-Chip

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Hash-based Scalable IP lookup using Bloom and Fingerprint Filters

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Reconfigurable Computing Architecture for Semantic Information Filtering

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Search Co-ordination by Semantic Routed Network

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-chip

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
A 2-Layer Laser Multiplexed Photonic Network-on-Chip

# publications[].label
Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Hybrid algorithm for accumulated error suppression in openloop Doppler receiver

# publications[].publisher
Institution of Engineering and Technology (IET)

# publications[].label
Preliminary Models of the Cost of Fault Tolerance

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
BPLight-CNN: A Photonics-based Backpropagation Accelerator for Deep   Learning

# publications[].label
Mapping of neural network models onto two-dimensional processor arrays

# publications[].label
Mapping of neural network models onto massively parallel hierarchical computer systems

# publications[].label
An energy-efficient hybrid data collection scheme in wireless sensor networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Identification of Voice Segments in Stereo Soundtracks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Time-Division-Multiplexed Test Delivery for NoC Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Temperature Aware Energy Management or Real-Time Scheduling

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
FPGA-based Distributed Edge Training of SVM

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A parallel formulation of back-propagation learning on distributed memory multiprocessors

# publications[].label
Mobile Sink Using Multiple Channels to Defend Against Wormhole Attacks in Wireless Sensor Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Reliability Aware Power Management for Dual-Processor Real-Time Embedded Systems

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Distributed Training of Support Vector Machine on a Multiple-FPGA System

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An Enhanced CAM Architecture to Accelerate LZW Compression Algorithm

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
The Three-Tier Security Scheme in Wireless Sensor Networks with Mobile Sinks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
PowerAntz: Ant behavior inspired power budget distribution scheme for Network-on-Chip systems

# publications[].label
A heuristic for peak power constrained design of network-on-chip (NoC) based multimode systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Relaxed Synchronization Approach for Solving Parallel Quadratic Programming Problems with Guaranteed Convergence

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An open-loop system design for deep space signal processing applications

# publications[].label
Fast On-Chip Data Transfer Using Sinusoid Signals

# publications[].label
Time-Division- Multiplexed test delivery for NoC systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Using FPGA implementations for evaluation of Internet Retransmission-Time-Out Predictors

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Optimizing a Semantic Comparator using CUDA-enabled Graphics Hardware

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Modelling a 2-D inverse fast cosine transform algorithm on a multistage network

# publications[].label
Sapp: scalable and adaptable peak power management in nocs

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
A New Array Fabric for Coarse-Grained Reconfigurable Architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
High Performance Code Generation through Lazy Activation Records

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Distributed Concurrent On-Line Test Scheduling Protocol for Many-Core NoC-Based Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Timing driven track routing considering coupling capacitance

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Design Space Exploration for Efficient Resource Utilization in Coarse-Grained Reconfigurable Architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Semantic Technologies for Distributed Search P2P Networks

# publications[].label
Mapping of Neural Network Models onto Systolic Arrays

# publications[].label
Representation of Complex Concepts for Semantic Routed Network

# publications[].label
Analytical bound for unwanted clock skew due to wire width variation

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Information Theoretic Approach to Address Delay and Reliability in Long On-Chip Interconnects

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An Infrastructure Ip for Online Testing of Network-On-Chip Based Socs

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Heuristic Function Evolution For Pathfinding Algorithm in FPGA Accelerator

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Analysis.of real-time embedded applications in the presence of a stochastic fault model

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A 2-Layer Laser Multiplexed Photonic Network-on-Chip

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Regions Discovery Algorithm for Pathfinding in Grid Based Maps

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Low Power Reconfiguration Technique for Coarse-Grained Reconfigurable Architecture

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Low power nanoscale buffer management for network on chip routers

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
In-Field NoC-Based SoC Testing with Distributed Test Vector Storage

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Evolutionary Heuristic A* Search: Pathfinding Algorithm with Self-Designed and Optimized Heuristic Function

# publications[].label
A multilayered VLSI array design for multistage interconnection network

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Interconnected Tile Standing Wave Resonant Oscillator based Clock Distribution Circuits

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
IntellBatt: Towards smarter battery design

# publications[].label
Private matching and set intersection computation in multi-agent and industrial control systems

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Energy characterization of filesystems for diskless embedded systems

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Implementation of fast Hartley transform on multiple bus cache coherent multiprocessors

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Clock Distribution for Fast Networks-on-Chip

# publications[].label
Microprocessor Implimentation of a Fast Convolver

# publications[].label
A memory-efficient hashing by multi-predicate bloom filters for packet classification

# publications[].label
A Fast, Source-synchronous Ring-based Network-on-Chip Design

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A Power and Throughput-Efficient Packet Classifier with n Bloom Filters

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Core Network Interface Architecture and Latency Constrained On-Chip  This work was supported by NSF award, CNS-0509483.

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
X-routing using two Manhattan route instances

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Continuous Authentication of Embedded Software

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
A key pre-distribution scheme for heterogeneous sensor networks

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
C plus plus dynamic cast in autonomous space systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Layer assignment for crosstalk risk minimization

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Interfacing cores with on-chip packet-switched networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
THE FAA HANDBOOK ON MICROPROCESSOR SELECTION AND EVALUATION IN AIRBORNE SYSTEMS

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Islands of Heaters: A Novel Thermal Management Framework for Photonic NoCs

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Modelling a fast parallel thinning algorithm for shared memory SIMD computers

# publications[].label
MODELLING A MORPHOLOGICAL THINNING ALGORITHM FOR SHARED MEMORY SIMD COMPUTERS

# publications[].label
Information theoretic capacity of long on-chip interconnects in the presence of crosstalk

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].publisher
Association for Computing Machinery (ACM)

# publications[].label
Secure Data Collection Scheme in Wireless Sensor Network with Mobile Sink

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Adaptive Group-Based Zero Knowledge Proof-Authentication Protocol in Vehicular Ad Hoc Networks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Reducing clock skew variability via crosslinks

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Modified LC-Trie based efficient routing lookup

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
Privacy-Preserving ECG based Active Authentication (PPEA2) for IoT Devices

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
DiCER: Distributed and cost-effective redundancy for variation tolerance

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# publications[].label
An On-Demand Test Triggering Mechanism for NoC-Based Safety-Critical Systems

# publications[].publisher
Institute of Electrical and Electronics Engineers (IEEE)

# researcherOn[].label
Characterizing COTS MCP Worst Case Execution Time

# researcherOn[].awardedBy.label
United States Department of Transportation - (Washington D.C., District of Columbia, United States)

# researcherOn[].awardedBy.preferredLabel
DOT-FAA-William J. Hughes Technical Center

# streetAddress
Texas A&M University; Computer Science & Engineering; 3112 TAMU

# etdChairOf[].label
Lee, Jason Daniel (2012-02). Concurrent Online Testing for Many Core Systems-on-Chips. Doctoral Dissertation.